Advantages of the field programmable gate array specialized resources for soft intellectual property cores
Abstract
Advantages of the field programmable gate array specialized resources for soft intellectual property cores
Incoming article date: 22.04.2021Soft intellectual property cores (IP-cores) based on a field programmable gate array (FPGA) are blocks that do not have a specific placement and prerouted interconnects on the chip. These blocks make it possible to speed up the design process of the digital circuits based on the FPGAs, while the use of the FPGA architecture specialized resources can increase the performance of the developed circuits that include soft IP-cores. These resources should be considered both in the soft IP-cores design and in the development of methods and algorithms for computer-aided design systems to achieve the greatest efficiency. In this paper, two soft IP-cores implementations are developed and a comparative analysis of the obtained blocks’ volumes and the used routing resources is carried out. In the first implementation, both the logical and layout syntheses take into account the basic FPGA structural features and FPGA specialized resources. In the second, only standard library elements and a common routing tree are used. On the results of the analysis, the advantages of the FPGA specialized architecture specialized resources in the soft IP-cores design are shown. Also the paper describes the specifics of these resources introduced by the FPGA developers, and the implementation features of the following soft IP-cores: n-bit adder / subtractor, up counter to n and n-bit shift register.
Keywords: intellectual property core, computer aided design, field programmable gate array, design flow, routing